Foundations of Quantum Resistant Cryptography

We examine the mathematical underpinnings, real-time implementations, and hardware architectures of post-quantum cryptographic algorithms, guided by the NIST PQC standardization process. Our research addresses open challenges, attack surfaces, and the need for cryptographic agility.

We formally evaluate algorithmic performance, parallelism, worst-case security assumptions, memory efficiency, and latency. Our work spans lightweight lattice-based cryptography, ultra-low latency designs, and seamless integration with existing digital infrastructures.

Algorithm Design

Open-Source Hardware Implementation of PQC Primitives

We have developed a collection of post-quantum cryptographic primitives optimized for FPGA platforms and commonly used security protocols. These implementations are specifically tailored to leverage the architectural strengths of FPGAs, incorporating algorithmic refinements that significantly reduce area and latency without compromising cryptographic integrity. The entire hardware suite is open-source, featuring synthesizable and fully verifiable RTL code. At its core, the design includes a highly configurable RTL framework equipped with an efficient n-point Number-Theoretic Transform (NTT) module, enabling rapid polynomial multiplication essential for lattice-based cryptography.

Hardware Designs

Privacy-Preserving Computing Solutions

The proliferation of sensor-driven and connected devices has made cloud computing a ubiquitous service. However, data privacy remains a critical concern, especially in shared-resource environments.

With over 2,500 known cloud vulnerabilities, a 150% increase in five years, our work focuses on secure computation frameworks that preserve privacy in cloud-based environments.

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